Instruction set architecture

Results: 1722



#Item
831Instruction set architectures / Central processing unit / Classes of computers / Assembly languages / Instruction set / Reduced instruction set computing / Superscalar / Addressing mode / Extendable instruction set computer / Computer architecture / Computing / Computer engineering

High-Performance Extendable Instruction Set Computing Heui Lee Asia Design Corporation [removed] Paul Beckett

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Source URL: researchbank.rmit.edu.au

Language: English
832Computing / Microcontrollers / Freescale Semiconductor / Instruction set architectures / Embedded systems / I.MX / Multi-core processor / ARM11 / Joint Test Action Group / Computer architecture / ARM architecture / Electronics

Freescale Semiconductor Data Sheet: Technical Data Document Number: MCIMX35SR2CEC Rev. 10, [removed]

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Source URL: cache.freescale.com

Language: English - Date: 2014-06-10 14:06:31
833Instruction set architectures / Exynos / 1E / Basic Linear Algebra Subprograms / ARM11 / IOS / ARM Cortex-A8 / Waltham / OMAP / Computer architecture / ARM architecture / Embedded microprocessors

Anatomy of a Globally Recursive Embedded LINPACK Benchmark Jack Dongarra and Piotr Luszczek Batteries included. Some assembly required.

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Source URL: web.eecs.utk.edu

Language: English - Date: 2012-09-12 20:53:25
834Freescale Semiconductor / Microcontrollers / Embedded systems / Instruction set architectures / Joint Test Action Group / Tegra / I.MX / QorIQ / PowerQUICC / Computer architecture / ARM architecture / Electronics

Freescale Semiconductor Data Sheet: Technical Data Document Number: IMX53CEC Rev. 6, [removed]

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Source URL: cache.freescale.com

Language: English - Date: 2014-06-10 12:18:28
835Microcontrollers / Computing / PIC microcontroller / Embedded systems / MPLAB / EEPROM / MOV / Fax / ARM architecture / Computer architecture / Computer hardware / Instruction set architectures

dsPIC30F to dsPIC33F dsPIC30F to dsPIC33F Conversion Guidelines Author: Both families support Programmable Power-up Timer (POR). The port I/O sink/source current is 4mA for the

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Source URL: ww1.microchip.com

Language: English - Date: 2006-01-13 16:31:59
836Freescale Semiconductor / Instruction set architectures / I.MX / Joint Test Action Group / Cell / ARM Cortex-A8 / Computer architecture / Microcontrollers / ARM architecture

Freescale Semiconductor Data Sheet: Technical Data Document Number: IMX51CEC Rev. 6, [removed]

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Source URL: cache.freescale.com

Language: English - Date: 2015-01-10 18:49:52
837Computing / Atmel AVR / Norwegian Institute of Technology / Status register / FLAGS register / Atmel AVR instruction set / Computer architecture / Microcontrollers / Instruction set architectures

Atmel 8-bit AVR Microcontroller with[removed]Bytes In-System Programmable Flash ATtiny4 / ATtiny5 / ATtiny9 / ATtiny10 Summary Features • High Performance, Low Power AVR® 8-Bit Microcontroller

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Source URL: www.atmel.com

Language: English - Date: 2014-10-13 09:29:01
838Microcontrollers / Computing / PIC microcontroller / Find first set / Word / Hexadecimal / Computer architecture / Binary arithmetic / Instruction set architectures

Quick Reference B.5 12-Bit Core Instruction Set Microchip’s base-line 8-bit microcontroller family uses a 12-bit wide instruction set. All instructions execute in a single instruction cycle unless otherwise

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Source URL: www.trash.net

Language: English - Date: 2004-12-22 07:39:09
839PIC microcontroller / Computer memory / Embedded systems / MIPS architecture / MOV / EEPROM / MPLAB / I²C / Universal asynchronous receiver/transmitter / Computer architecture / Microcontrollers / Instruction set architectures

dsPIC30F5011/5013 dsPIC30F5011/5013 Rev. A1/A2 Silicon Errata dsPIC30F5011[removed]Rev. A1/A2) Silicon Errata The dsPIC30F5011[removed]Rev. A1/A2) samples you have received were found to conform to the specifications and fun

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Source URL: ww1.microchip.com

Language: English - Date: 2009-05-06 20:15:21
840Software / X86 architecture / X86-64 / 64-bit / Solaris / IBM Tivoli Storage Manager / Itanium / X86 / Adaptive Server Enterprise / Computer architecture / Computing / Instruction set architectures

SAP® Adaptive Server® Enterprise Document Version: [removed] Release Bulletin for Linux Table of Contents

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Source URL: help.sap.com

Language: English - Date: 2014-10-14 12:36:48
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